74AC11257PW.A中文資料德州儀器數(shù)據(jù)手冊(cè)PDF規(guī)格書

3-State Outputs Interface Directly With

System Bus

Flow-Through Architecture Optimizes

PCB Layout

Center-Pin VCC and GND Configurations

Minimize High-Speed Switching Noise

500-mA Typical Latch-Up Immunity at

125°C

Provides Bus Interface From Multiple

Sources in High-Performance Systems

description/ordering information

This device is designed to multiplex signals from 4-bit data sources to four output data lines in bus-organized

systems. The 3-state outputs do not load the data lines when the output-enable (OE) input is at a high logic level.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.