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74ACT16823DLR集成電路(IC)的觸發(fā)器規(guī)格書(shū)PDF中文資料

廠商型號(hào) |
74ACT16823DLR |
參數(shù)屬性 | 74ACT16823DLR 封裝/外殼為56-BSSOP(0.295",7.50mm 寬);包裝為管件;類(lèi)別為集成電路(IC)的觸發(fā)器;產(chǎn)品描述:IC FF D-TYPE DUAL 9BIT 56SSOP |
功能描述 | 主復(fù)位 |
絲印標(biāo)識(shí) | |
封裝外殼 | SSOP / 56-BSSOP(0.295",7.50mm 寬) |
文件大小 |
283.96 Kbytes |
頁(yè)面數(shù)量 |
11 頁(yè) |
生產(chǎn)廠商 | Texas Instruments |
企業(yè)簡(jiǎn)稱 |
TI2【德州儀器】 |
中文名稱 | 美國(guó)德州儀器公司官網(wǎng) |
原廠標(biāo)識(shí) | ![]() |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2025-7-11 8:31:00 |
人工找貨 | 74ACT16823DLR價(jià)格和庫(kù)存,歡迎聯(lián)系客服免費(fèi)人工找貨 |
74ACT16823DLR規(guī)格書(shū)詳情
74ACT16823DLR屬于集成電路(IC)的觸發(fā)器。由美國(guó)德州儀器公司制造生產(chǎn)的74ACT16823DLR觸發(fā)器觸發(fā)器是能夠存儲(chǔ)單個(gè)邏輯狀態(tài)或信息“位”的基本數(shù)字存儲(chǔ)器件。這些器件至少有兩個(gè)輸入;一個(gè)或多個(gè)用于傳遞要存儲(chǔ)的數(shù)據(jù),另一個(gè)用于指示存儲(chǔ)該數(shù)據(jù)的時(shí)間點(diǎn)。不同的觸發(fā)器類(lèi)型,例如 D(延遲)、SR(置位復(fù)位)和 JK,對(duì)提供給其輸入的信號(hào)有不同的響應(yīng),可用于實(shí)現(xiàn)不同的邏輯功能。這些器件與鎖存器的不同之處在于它們是邊緣敏感器件,其保持的邏輯狀態(tài)僅在接收到有效時(shí)鐘信號(hào)時(shí)才會(huì)改變。
EPICE (Enhanced-Performance Implanted
CMOS) 1-mm Process
Members of the Texas Instruments
WidebusE Family
Inputs Are TTL-Voltage Compatible
Provide Extra Data Width Necessary for
Wider Address/Data Paths or Buses With
Parity
Flow-Through Architecture Optimizes PCB
Layout
Distributed VCC and GND-Pin Configuration
Minimizes High-Speed Switching Noise
Package Options Include Plastic Shrink
Small-Outline (DL) Packages Using 25-mil
Center-to-Center Pin Spacings and 380-mil
Fine-Pitch Ceramic Flat (WD) Packages
Using 25-mil Center-to-Center Pin Spacings
description
These 18-bit flip-flops feature 3-state outputs
designed specifically for driving highly-capacitive
or relatively low-impedance loads. They are
particularly suitable for implementing wider buffer
registers, I/O ports, parity bus interfacing, and
working registers.
The ’ACT16823 devices can be used as two 9-bit
flip-flops or one 18-bit flip-flop. With the
clock-enable (CLKEN) input low, the D-type
flip-flops enter data on the low-to-high transitions
of the clock. Taking CLKEN high disables the
clock buffer, thus latching the outputs. Taking the
clear (CLR) input low causes the Q outputs to go
low independently of the clock.
A buffered output-enable (OE) input can be used to place the outputs in either a normal logic state (high or low
logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the
bus lines significantly.
OE does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
The 54ACT16823 is characterized for operation over the full military temperature range of –55°C to 125°C. The
74ACT16823 is characterized for operation from –40°C to 85°C
產(chǎn)品屬性
更多- 產(chǎn)品編號(hào):
74ACT16823DLR
- 制造商:
Texas Instruments
- 類(lèi)別:
集成電路(IC) > 觸發(fā)器
- 系列:
74ACT
- 包裝:
管件
- 功能:
主復(fù)位
- 類(lèi)型:
D 型
- 輸出類(lèi)型:
三態(tài),非反相
- 不同 V、最大 CL 時(shí)最大傳播延遲:
11.5ns @ 5V,50pF
- 觸發(fā)器類(lèi)型:
正邊沿
- 電流 - 輸出高、低:
24mA,24mA
- 電壓 - 供電:
4.5V ~ 5.5V
- 工作溫度:
-40°C ~ 85°C(TA)
- 安裝類(lèi)型:
表面貼裝型
- 供應(yīng)商器件封裝:
56-SSOP
- 封裝/外殼:
56-BSSOP(0.295",7.50mm 寬)
- 描述:
IC FF D-TYPE DUAL 9BIT 56SSOP
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
TI |
2025+ |
SSOP-56 |
16000 |
原裝優(yōu)勢(shì)絕對(duì)有貨 |
詢價(jià) | ||
TI |
23+ |
SOP |
5000 |
全新原裝,支持實(shí)單,非誠(chéng)勿擾 |
詢價(jià) | ||
TEXASIN |
2020+ |
SSOP56 |
388 |
百分百原裝正品 真實(shí)公司現(xiàn)貨庫(kù)存 本公司只做原裝 可 |
詢價(jià) | ||
TI |
23+ |
NA |
20000 |
詢價(jià) | |||
TI(德州儀器) |
24+ |
SSOP56 |
1612 |
只做原裝,提供一站式配單服務(wù),代工代料。BOM配單 |
詢價(jià) | ||
TI/德州儀器 |
24+ |
SOP |
880000 |
明嘉萊只做原裝正品現(xiàn)貨 |
詢價(jià) | ||
TEXASINSTR |
24+ |
NA/ |
187 |
優(yōu)勢(shì)代理渠道,原裝正品,可全系列訂貨開(kāi)增值稅票 |
詢價(jià) | ||
TI |
21+ |
SOP |
650 |
原裝現(xiàn)貨假一賠十 |
詢價(jià) | ||
TI |
24+ |
SOP |
7500 |
只做原裝正品現(xiàn)貨 歡迎來(lái)電查詢15919825718 |
詢價(jià) | ||
TI |
24+ |
SOP |
2987 |
只售原裝自家現(xiàn)貨!誠(chéng)信經(jīng)營(yíng)!歡迎來(lái)電! |
詢價(jià) |