74HCT373BQ

Octal D-type transparent latch; 3-state

1.Generaldescription The74HC373;74HCT373isanoctalD-typetransparentlatchwith3-stateoutputs.Thedevice featureslatchenable(LE)andoutputenable(OE)inputs.WhenLEisHIGH,dataattheinputs enterthelatches.Inthisconditionthelatchesaretransparent,alatchoutputwill

74HCT373BQ

Octal D-type transparent latch; 3-state

Generaldescription The74HC373;74HCT373isahigh-speedSi-gateCMOSdeviceandispincompatiblewithLow-powerSchottkyTTL.ItisspecifiedincompliancewithJEDECstandardno.7A. The74HC373;74HCT373isanoctalD-typetransparentlatchfeaturingseparateD-typeinputsforeachlatchan

恩XP

74HCT373BQ

Octal D-type transparent latch; 3-state; ? Input levels:? For 74HC373: CMOS level\n? For 74HCT373: TTL level\n\n? 3-state non-inverting outputs for bus oriented applications\n? Common 3-state output enable input\n? Functionally identical to the 74HC563; 74HCT563 and 74HC573; 74HCT573\n? Complies with JEDEC standard no. 7 A\n? ESD protection:? HBM JESD22-A114F exceeds 2 000 V\n? MM JESD22-A115-A exceeds 200 V\n\n? Multiple package options\n? Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n;

The 74HC373; 74HCT373 is an octal D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the latches. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.\n

74HCT373BQ-Q100

Octal D-type transparent latch; 3-state; ? Automotive product qualification in accordance with AEC-Q100 (Grade 1)? Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n? Input levels:? For 74HC373-Q100: CMOS level\n? For 74HCT373-Q100: TTL level\n\n? 3-state non-inverting outputs for bus-oriented applications\n? Common 3-state output enable input\n? Functionally identical to the 74HC573-Q100; 74HCT573-Q100\n? ESD protection:? MIL-STD-883, method 3015 exceeds 2000 V\n? HBM JESD22-A114F exceeds 2000 V\n? MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)\n\n? Multiple package options\n;

The 74HC373-Q100; 74HCT373-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL. It is specified in compliance with JEDEC standard no. 7A.\n The 74HC373-Q100; 74HCT373-Q100 is an octal D-type transparent latch featuring separate D-type inputs for each latch and 3-state outputs for bus-oriented applications. A latch enable (LE) input and an output enable (OE) input are common to all latches.\n The 74HC373-Q100; 74HCT373-Q100 consists of eight D-type transparent latches with 3-state true outputs. When LE is HIGH, data at the Dn inputs enters the latches. In this condition the latches are transparent, i.e. a latch output changes state each time its corresponding D input changes.\n When LE is LOW, the latches store the information that was present at the D inputs a set-up time preceding the HIGH-to-LOW transition of LE. When OE is LOW, the contents of the 8 latches are available at the outputs. When OE is HIGH, the outputs go to the highimpedance OFF-state. Operation of the OE input does not affect the state of the latches.\n The 74HC373-Q100; 74HCT373-Q100 is functionally identical to:\n74HC573-Q100; 74HCT573-Q100: but different pin arrangement This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.\n

74HCT373BQ-Q100

Octal D-type transparent latch; 3-state

1.Generaldescription The74HC373-Q100;74HCT373-Q100isanoctalD-typetransparentlatchwith3-stateoutputs. Thedevicefeatureslatchenable(LE)andoutputenable(OE)inputs.WhenLEisHIGH,dataat theinputsenterthelatches.Inthisconditionthelatchesaretransparent,alatchou

74HCT373BQ-Q100

Octal D-type transparent latch; 3-state

恩XP

74HCT373BQ,115

Package：20-VFQFN 裸露焊盤；包裝：管件 類別：集成電路（IC） 鎖存器 描述：IC OCTAL D TRANSP LATCH 20DHVQFN

74HCT373BQ-Q100,11

Package：20-VFQFN 裸露焊盤；包裝：管件 類別：集成電路（IC） 鎖存器 描述：IC TRANSP LATCH OCT D 20DHVQFN