首頁 >74LVC1G58GV>規(guī)格書列表
零件型號 | 下載 訂購 | 功能描述 | 制造商 上傳企業(yè) | LOGO |
---|---|---|---|---|
74LVC1G58GV | Low-power configurable multiple function gate Generaldescription The74LVC1G58providesconfigurablemultiplefunctions.Theoutputstateisdeterminedbyeightpatternsof3-bitinput.TheusercanchoosethelogicfunctionsAND,OR,NAND,NOR,XOR,inverterandbuffer.AllinputscanbeconnectedtoVCCorGND. Thethreeinputs(A,B | ETC | ETC | |
74LVC1G58GV | 絲?。?a target="_blank" title="Marking" href="/y58/marking.html">Y58;Package:SOT457;Low-power configurable multiple function gate 1.Generaldescription The74LVC1G58isaconfigurablemultiplefunctiongatewithSchmitt-triggerinputs.Thedevice canbeconfiguredasanyofthefollowinglogicfunctionsAND,OR,NAND,NOR,XOR,inverter andbuffer;usingthe3-bitinput.AllinputscanbeconnecteddiectlytoVCCorGND. | NEXPERIANexperia B.V. All rights reserved 安世安世半導體(中國)有限公司 | NEXPERIA | |
74LVC1G58GV | Low-power configurable multiple function gate Generaldescription The74LVC1G58isahigh-performance,low-power,low-voltage,Si-gateCMOSdevice,superiortomostadvancedCMOScompatibleTTLfamilies. Inputscanbedrivenfromeither3.3Vor5Vdevices.Thisfeatureallowstheuseofthisdeviceinamixed3.3Vand5Venvironment | PHIPhilips Semiconductors 飛利浦荷蘭皇家飛利浦 | PHI | |
74LVC1G58GV | Low-power configurable multiple function gate; ? Wide supply voltage range from 1.65 V to 5.5 V\n? 5 V tolerant input/output for interfacing with 5 V logic\n? High noise immunity\n? Complies with JEDEC standard:? JESD8-7 (1.65 V to 1.95 V)\n? JESD8-5 (2.3 V to 2.7 V)\n? JESD8B/JESD36 (2.7 V to 3.6 V).\n\n? ESD protection:? HBM JESD22-A114F exceeds 2000 V\n? MM JESD22-A115-A exceeds 200 V.\n\n? ±24 mA output drive (VCC = 3.0 V)\n? CMOS low power consumption\n? Latch-up performance exceeds 250 mA\n? Direct interface with TTL levels\n? Inputs accept voltages up to 5 V\n? Multiple package options\n? Specified from -40 °C to +85 °C and -40 °C to +125 °C.\n; The 74LVC1G58 provides configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND, NOR, XOR, inverter and buffer. All inputs can be connected to VCC or GND.\n Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment.\n This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.\n All inputs (A, B and C) are Schmitt trigger inputs. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.\n | NexperiaNexperia B.V. All rights reserved 安世安世半導體(中國)有限公司 | Nexperia | |
74LVC1G58GV | Low-power configurable multiple function gate | ETC | ETC | |
Low-power configurable multiple function gate; ? Automotive product qualification in accordance with AEC-Q100 (Grade 1)? Specified from ?40 °C to +85 °C and from ?40 °C to +125 °C\n\n? Wide supply voltage range from 1.65 V to 5.5 V\n? 5 V tolerant input/output for interfacing with 5 V logic\n? High noise immunity\n? Complies with JEDEC standard:? JESD8-7 (1.65 V to 1.95 V)\n? JESD8-5 (2.3 V to 2.7 V)\n? JESD8B/JESD36 (2.7 V to 3.6 V).\n\n? ESD protection:? MIL-STD-883, method 3015 exceeds 2000 V\n? HBM JESD22-A114F exceeds 2000 V\n? MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)\n\n? ±24 mA output drive (VCC = 3.0 V)\n? CMOS low power consumption\n? Latch-up performance exceeds 250 mA\n? Direct interface with TTL levels\n? Inputs accept voltages up to 5 V\n? Multiple package options\n; The 74LVC1G58-Q100 provides configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND, NOR, XOR, inverter and buffer. All inputs can be connected to VCC or GND.\n Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment.\n This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.\n All inputs (A, B and C) are Schmitt trigger inputs. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.\n This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.\n | NexperiaNexperia B.V. All rights reserved 安世安世半導體(中國)有限公司 | Nexperia | ||
絲?。?a target="_blank" title="Marking" href="/v58/marking.html">V58;Package:TSOP6;Low-power configurable multiple function gate | NEXPERIANexperia B.V. All rights reserved 安世安世半導體(中國)有限公司 | NEXPERIA | ||
Package:SC-74,SOT-457;包裝:管件 類別:集成電路(IC) 門和反相器 - 多功能,可配置 描述:IC CONFIG MULTIPLE FUNCT 6TSOP | ETC | ETC | ||
Package:SC-74,SOT-457;包裝:卷帶(TR) 類別:集成電路(IC) 門和反相器 - 多功能,可配置 描述:IC CONFIG MULTIPLE FUNCT 6TSOP | ETC | ETC |
技術(shù)參數(shù)
- VCC (V):
1.65?-?5.5
- Logic switching levels:
TTL
- Output drive capability (mA):
± 32
- tpd (ns):
6.3
- fmax (MHz):
150
- Nr of bits:
1
- Power dissipation considerations:
low
- Tamb (°C):
-40~125
- Rth(j-a) (K/W):
250
- Ψth(j-top) (K/W):
54.7
- Rth(j-c) (K/W):
163
- Package name:
TSOP6
供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
恩XP |
24+ |
標準封裝 |
7254 |
全新原裝正品/價格優(yōu)惠/質(zhì)量保障 |
詢價 | ||
恩XP |
21+ |
SOT23-6 |
11000 |
只做正品原裝現(xiàn)貨 |
詢價 | ||
恩XP |
23+ |
NA |
2860 |
原裝正品代理渠道價格優(yōu)勢 |
詢價 | ||
恩XP |
23+ |
NA |
20094 |
正納10年以上分銷經(jīng)驗原裝進口正品做服務(wù)做口碑有支持 |
詢價 | ||
恩XP |
21+ |
6000 |
只做原裝正品,賣元器件不賺錢交個朋友 |
詢價 | |||
恩XP |
23+ |
TSSOP |
8000 |
只做原裝現(xiàn)貨 |
詢價 | ||
恩XP |
23+ |
TSSOP |
7000 |
詢價 | |||
恩XP |
25+ |
SOT457 |
188600 |
全新原廠原裝正品現(xiàn)貨 歡迎咨詢 |
詢價 | ||
恩XP |
24+ |
3000 |
詢價 | ||||
Nexperia USA Inc. |
24+ |
6-TSOP |
56300 |
一級代理/放心采購 |
詢價 |
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