843002I

FemtoClockTM Crystal-To-3.3V, 2.5V

GENERALDESCRIPTION The843002Iisa2outputLVPECLsynthesizer optimizedtogenerateFibreChannelreference clockfrequenciesandisamemberofthefamilyofhigh performanceclocksolutionsfromIDT.Usinga26.5625MHz, 18pFparallelresonantcrystal,thefollow

843002I-01

FemtoClocks? Crystal-to3.3V, 2.5V LVPECL Frequency Synthesizer

GENERALDESCRIPTION The843002I-01isa2outputLVPECLsynthesizeroptimizedto generateEthernetreferenceclockfrequencies.Usinga25MHz 18pFparallelresonantcrystal,thefollowingfrequenciescanbe generatedbasedonthe2frequencyselectpins(F_SEL[1:0]): 156.25MHz,125MHz,and62

843002I-01

FemtoClock? Crystal-to-3.3V,2.5V LVPECL Frequency Synthesizer

The 843002I-01 is a 2 output LVPECL synthesizer optimized to generate Ethernet reference clock frequencies. Using a 25MHz 18pF parallel resonant crystal, the following frequencies can be generated based on the 2 frequency select pins (F_SEL[1:0]): 156.25MHz, 125MHz, and 62.5MHz. The 843002I- 01 uses; ·Two 3.3V or 2.5V LVPECL outputs\n·Selectable crystal oscillator interface or LVCMOS/LVTTL single-ended input\n·Supports the following output frequencies: 156.25MHz, 125MHz and 62.5MHz\n·VCO range: 560MHz - 680MHz\n·RMS phase jitter @ 156.25MHz, using a 25MHz crystal (1.875MHz-20MHz): 0.55ps (typica;

843002I-40

175MHz, FemtoClock? VCXO Based Sonet/SDH Jitter Attenuators

GeneralDescription TheICS843002I-40isaPLLbasedsynchronousclockgenerator thatisoptimizedforSONET/SDHlinecardapplicationswhere jitterattenuationandfrequencytranslationisneeded.Thedevice containstwointernalPLLstagesthatarecascadedinseries.The firstPLLstageus

843002I-41

700MHZ, FemtoClock? VCXO Based Sonet/SDH Jitter Attenuators

GeneralDescription TheICS843002I-41isaPLLbasedsynchronousclockgenerator thatisoptimizedforSONET/SDHlinecardapplicationswhere jitterattenuationandfrequencytranslationisneeded.Thedevice containstwointernalPLLstagesthatarecascadedinseries.The firstPLLstageus

843002I-41

700MHz,FemtoClock? VCXO Based SONET/SDH Jitter Attenuator

The 843002I-41 is a PLL based synchronous clock generator that is optimized for SONET/SDH line card applications where jitter attenuation and frequency translation is needed. The device contains two internal PLL stages that are cascaded in series. The first PLL stage uses a VCXO which is optimized t; ·Two Differential LVPECL outputs\n·Selectable CLKx, nCLKx differential input pairs\n·CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL or single-ended LVCMOS or LVTTL levels\n·Maximum output frequency: 700MHz\n·FemtoClock VCO frequency range: 560M;

843002I-01

LVPECL Frequency Synthesizer

843002I-40

175MHz, FemtoClock VCXO Based Sonet/SDH Jitter Attenuators

843002I-41

700MHZ, FemtoClock VCXO Based Sonet/SDH Jitter Attenuators