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ADF4378BCCZ-RL7中文資料亞德諾數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

廠商型號(hào) |
ADF4378BCCZ-RL7 |
功能描述 | Microwave Wideband Synthesizer with Integrated VCO and Deterministic General- Purpose Pulse Retimer |
文件大小 |
4.66929 Mbytes |
頁(yè)面數(shù)量 |
85 頁(yè) |
生產(chǎn)廠商 | Analog Devices |
企業(yè)簡(jiǎn)稱(chēng) |
AD【亞德諾】 |
中文名稱(chēng) | 亞德諾半導(dǎo)體技術(shù)有限公司官網(wǎng) |
原廠標(biāo)識(shí) | ![]() |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2025-7-20 14:13:00 |
人工找貨 | ADF4378BCCZ-RL7價(jià)格和庫(kù)存,歡迎聯(lián)系客服免費(fèi)人工找貨 |
ADF4378BCCZ-RL7規(guī)格書(shū)詳情
GENERAL DESCRIPTION
The ADF4378 is a high performance, ultra-low jitter, integer-N
phased locked loop (PLL) with an integrated voltage controlled
oscillator (VCO) and system reference (SYSREF) retimer ideally
suited for data converter and mixed signal front end (MxFE) clock
applications. The high performance PLL has a ?239 dBc/Hz: normalized
in-band phase noise floor, ultra-low 1/f noise, and a high
phase/frequency detector (PFD) frequency that can achieve ultralow
in-band noise and integrated jitter. The fundamental VCO and
output divider of the ADF4378 generate frequencies from 800 MHz
to 12.8 GHz. The ADF4378 integrates all necessary power-supply
bypass capacitors, which saves board space on compact boards.
For multiple data converter and MxFE clock applications, the
ADF4378 simplifies clock alignment and calibration routines required
with other clock solutions by implementing the automatic
reference to output synchronization feature, the matched reference
to output delays across process, voltage, and temperature feature,
and the less than ±0.1 ps, jitter free reference to output delay
adjustment capability feature.
FEATURES
? Output frequency range: 800 MHz to 12.8 GHz
? Jitter = 18 fsRMS (integration bandwidth: 100 Hz to 100 MHz)
? Jitter = 27 fsRMS (ADC SNR method)
? Wideband noise floor: ?160 dBc/Hz at 12 GHz
? Retimed LVDS SYSREF output
? General-purpose pulse retimer for SYSREF, SYNC, and MCS
applications
? PLL specifications
? ?239 dBc/Hz: normalized in-band phase noise floor
? ?147 dBc/Hz: normalized in-band 1/f phase noise floor
? Phase detector frequency up to 500 MHz
? Reference input frequency up to 1000 MHz
? Typical spurious fPFD: ?95 dBc PFD at fOUT = 12 GHz
? Reference input to output delay specifications
? Device-to-device standard deviation: 3 ps
? Temperature coefficient: 0.03 ps/°C
? Adjustment step size: < ±0.1 ps
? Multichip output phase alignment
? 3.3 V and 5 V power supplies
? Available in 48-lead, 7 mm × 7 mm LGA package
APPLICATIONS
? High performance data converter and MxFE clocking
? Wireless infrastructure (MC-GSM, 5G)
? Test and measurement
? FPGA with integrated data converters
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
ADI |
20+ |
LFCSP |
33680 |
ADI全新原裝-可開(kāi)原型號(hào)增稅票 |
詢(xún)價(jià) | ||
ADI |
ROHS+Original |
NA |
3000 |
專(zhuān)業(yè)電子元器件供應(yīng)鏈/QQ 350053121 /正納電子 |
詢(xún)價(jià) | ||
ADI/亞德諾 |
22+ |
66900 |
原封裝 |
詢(xún)價(jià) | |||
ADI/亞德諾 |
2324+ |
SMD |
78920 |
二十余載金牌老企,研究所優(yōu)秀合供單位,您的原廠窗口 |
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專(zhuān)營(yíng)ADI |
24+ |
QFN |
9600 |
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AD |
24+ |
9000 |
5000 |
原裝現(xiàn)貨 |
詢(xún)價(jià) | ||
ADI/亞德諾 |
2511 |
原封裝 |
66900 |
電子元器件采購(gòu)降本 30%!盈慧通原廠直采,砍掉中間差價(jià) |
詢(xún)價(jià) | ||
ADI |
21+ |
QFN |
12588 |
原裝正品,自己庫(kù)存 假一罰十 |
詢(xún)價(jià) | ||
AD |
24+ |
LFCSP40 |
6000 |
只做自己庫(kù)存,全新原裝進(jìn)口正品假一賠百,可開(kāi)13%增 |
詢(xún)價(jià) | ||
ADI/亞德諾 |
23+ |
SOP16 |
5000 |
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