ADMV1018

24 GHz 至 29.5 GHz 的 5G 升頻/降頻轉(zhuǎn)換器; ? RF 輸入/輸出頻率范圍：24 GHz 至 29.5 GHz，將 n257、n258 和 n261 頻段集成在一個(gè)尺寸內(nèi)\n\n? 1.5 GHz RF 帶寬\n\n? 兩種升頻轉(zhuǎn)換模式\n? 從差分基帶 I/Q 或具有優(yōu)化 IF 范圍的單端復(fù)合 IF 直接轉(zhuǎn)換為 RF 單邊帶升頻\n\n\n\n\n? 兩種降頻轉(zhuǎn)換模式\n? 從 RF 到差分基帶 I/Q 直接轉(zhuǎn)換\n\n? 鏡像抑制降頻轉(zhuǎn)換或單端復(fù)合 IF\n\n\n\n\n? LO 雙倍頻器 (x2) 和四倍頻器 (x4) 模式\n\n? 匹配的 50? RF 信號(hào)和 LO 端口\n\n? 優(yōu)化的封裝可改善熱性能\n\n? 符合 3GPP 規(guī)范;

The ADMV1018 is a silicon germanium (SiGe), microwave, upconverter and downconverter optimized for 5G radio designs operating in the 24.0 GHz to 29.5 GHz frequency range.\n\n The upconverter offers two modes of frequency translation. The device is capable of direct conversion to RF from differential baseband inphase/quadrature (I/Q) input signals, as well as single-sideband upconversion from complex intermediate frequency (IF) inputs. The differential baseband I/Q input path can be disabled, and modulated, single-ended, complex IF signals from 2 GHz to 9.5 GHz can be fed to the IF path. These signals can then be upconverted to 24.0 GHz to 29.5 GHz while rejecting the unwanted sideband by typically greater than 25 dBc. The serial port interface (SPI) provides adjustment of the quadrature phase to allow optimum sideband rejection. In addition, the SPI interface allows powering down the output envelope detector to reduce power consumption when carrier feedthrough optimization is not necessary.\n\n The downconverter offers two modes of frequency translation. The device is capable of direct quadrature demodulation to differential baseband I/Q output signals, as well as image rejection downconversion to a single-ended complex IF output carrier frequency. The I/Q baseband output common-mode voltage is programmable between 0.75 V and 2.15 V. The SPI provides fine adjustment of the quadrature phase to optimize I/Q demodulation performance. Alternatively, the baseband I/Q outputs can be disabled, and the I/Q signals can be passed through an on-chip, active balun to provide two, single-ended, complex IF outputs between 2 GHz and 9.5 GHz. When the device is used as an image rejecting downconverter, the unwanted image term is typically rejected to greater than 25 dBc. The ADMV1018 offers a square law power detector to allow monitoring of the power levels at the mixer inputs. The detector output provides closed-loop control of the RF digital step attenuator (DSA) via an external automatic gain control (AGC) loop.\n\n The ADMV1018 upconverter and downconverter is housed in a compact, thermally enhanced, 9 mm × 8 mm, land grid array (LGA) package. This LGA package enables the ability to heat-sink the ADMV1018 from the top of the package for the most efficient thermal heatsinking. The ADMV1018 operates over the ?40°C to +95°C case temperature range.\n\n Throughout the figures in the data sheet, Rx means receiver and Tx means transmitter.\n\n APPLICATIONS\n\n5G applicationsPoint to point microwave radiosRadar and electronic warfare systemsInstrumentation and automatic test equipment (ATE)

ADMV1018

100MHz to 70GHz Linear-in-dB RMS Power Detector with 35dB Dynamic Range

ADS1018

Ultra-Small,Low-Power,SPI-Compatible,16-BitAnalog-to-DigitalConverterandTemperatureSensorwithInternalReference

ADS1018

Ultra-Small,Low-Power,SPI??Compatible,16-Bit

ADS1018

Ultra-Small,Low-Power,SPI??Compatible,16-BitAnalog-to-DigitalConverterandTemperatureSensorwithInternalReference

ADS1018

Ultra-Small,Low-Power,SPI??Compatible,12-Bit,Analog-to-DigitalConverterandTemperatureSensorwithInternalReference

ADS1018IDGSR

Ultra-Small,Low-Power,SPI??Compatible,12-Bit,Analog-to-DigitalConverterandTemperatureSensorwithInternalReference

ADS1018IDGSR

Analog-to-DigitalConverterInternalReferenceandTemperatureSensor

ADS1018IDGST

Ultra-Small,Low-Power,SPI??Compatible,12-Bit,Analog-to-DigitalConverterandTemperatureSensorwithInternalReference

ADS1018IDGST

Analog-to-DigitalConverterInternalReferenceandTemperatureSensor