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CD74ACT163M96.A中文資料德州儀器數(shù)據(jù)手冊(cè)PDF規(guī)格書

廠商型號(hào) |
CD74ACT163M96.A |
功能描述 | 4-BIT SYNCHRONOUS BINARY COUNTERS |
絲印標(biāo)識(shí) | |
封裝外殼 | SOIC |
文件大小 |
462.2 Kbytes |
頁面數(shù)量 |
18 頁 |
生產(chǎn)廠商 | Texas Instruments |
企業(yè)簡(jiǎn)稱 |
TI2【德州儀器】 |
中文名稱 | 美國(guó)德州儀器公司官網(wǎng) |
原廠標(biāo)識(shí) | ![]() |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2025-7-9 22:59:00 |
人工找貨 | CD74ACT163M96.A價(jià)格和庫存,歡迎聯(lián)系客服免費(fèi)人工找貨 |
CD74ACT163M96.A規(guī)格書詳情
Inputs Are TTL-Voltage Compatible
Internal Look-Ahead for Fast Counting
Carry Output for n-Bit Cascading
Synchronous Counting
Synchronously Programmable
description/ordering information
The ’ACT163 devices are 4-bit binary counters.
These synchronous, presettable counters feature
an internal carry look-ahead for application in
high-speed counting designs. Synchronous
operation is provided by having all flip-flops
clocked simultaneously so that the outputs change, coincident with each other, when instructed by the
count-enable (ENP, ENT) inputs and internal gating. This mode of operation eliminates the output counting
spikes normally associated with synchronous (ripple-clock) counters. A buffered clock (CLK) input triggers the
four flip-flops on the rising (positive-going) edge of the clock waveform.
The counters are fully programmable; that is, they can be preset to any number between 0 and 9 or 15.
Presetting is synchronous; therefore, setting up a low level at the load input disables the counter and causes
the outputs to agree with the setup data after the next clock pulse, regardless of the levels of the enable inputs.
The clear function is synchronous. A low level at the clear (CLR) input sets all four of the flip-flop outputs low
after the next low-to-high transition of CLK, regardless of the levels of the enable inputs. This synchronous clear
allows the count length to be modified easily by decoding the Q outputs for the maximum count desired. The
active-low output of the gate used for decoding is connected to CLR to synchronously clear the counter to 0000
(LLLL).
The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without
additional gating. ENP, ENT, and a ripple-carry output (RCO) are instrumental in accomplishing this function.
Both ENP and ENT must be high to count, and ENT is fed forward to enable RCO. Enabling RCO produces a
high-level pulse while the count is maximum (9 or 15, with QA high). This high-level overflow ripple-carry pulse
can be used to enable successive cascaded stages. Transitions at ENP or ENT are allowed, regardless of the
level of CLK.
These devices feature a fully independent clock circuit. Changes at control inputs (ENP, ENT, or LOAD) that
modify the operating mode have no effect on the contents of the counter until clocking occurs. The function of
the counter (whether enabled, disabled, loading, or counting) is dictated solely by the conditions meeting the
stable setup and hold times.
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
TI(德州儀器) |
24+ |
SOP16 |
7350 |
現(xiàn)貨供應(yīng),當(dāng)天可交貨!免費(fèi)送樣,原廠技術(shù)支持!!! |
詢價(jià) | ||
TI(德州儀器) |
24+ |
SOP16 |
3238 |
原裝現(xiàn)貨,免費(fèi)供樣,技術(shù)支持,原廠對(duì)接 |
詢價(jià) | ||
HAR |
24+/25+ |
200 |
原裝正品現(xiàn)貨庫存價(jià)優(yōu) |
詢價(jià) | |||
Texas Instruments |
23+ |
16-SOIC |
7300 |
專注配單,只做原裝進(jìn)口現(xiàn)貨 |
詢價(jià) | ||
TI/德州儀器 |
23+ |
DIP |
8215 |
原廠原裝 |
詢價(jià) | ||
TI |
24+ |
SMD |
20000 |
一級(jí)代理原裝現(xiàn)貨假一罰十 |
詢價(jià) | ||
TI |
25+ |
SOIC16 |
3200 |
全新原裝、誠(chéng)信經(jīng)營(yíng)、公司現(xiàn)貨銷售! |
詢價(jià) | ||
TI |
24+ |
SOIC16 |
200 |
只做原裝,歡迎詢價(jià),量大價(jià)優(yōu) |
詢價(jià) | ||
TI |
24+ |
SOIC16 |
222 |
詢價(jià) | |||
TI(德州儀器) |
2021+ |
SOIC-16 |
499 |
詢價(jià) |