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CD74HC192E.A中文資料德州儀器數(shù)據(jù)手冊PDF規(guī)格書

CD74HC192E.A
廠商型號

CD74HC192E.A

功能描述

High-Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

文件大小

759.25 Kbytes

頁面數(shù)量

27

生產(chǎn)廠商 Texas Instruments
企業(yè)簡稱

TI2德州儀器

中文名稱

美國德州儀器公司官網(wǎng)

原廠標識
數(shù)據(jù)手冊

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更新時間

2025-7-6 23:00:00

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CD74HC192E.A規(guī)格書詳情

Features

? Synchronous Counting and Asynchronous

Loading

? Two Outputs for N-Bit Cascading

? Look-Ahead Carry for High-Speed Counting

? Fanout (Over Temperature Range)

- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

? Wide Operating Temperature Range . . . -55oC to 125oC

? Balanced Propagation Delay and Transition Times

? Significant Power Reduction Compared to LSTTL

Logic ICs

? HC Types

- 2V to 6V Operation

- High Noise Immunity: NIL = 30%, NIH = 30% of VCC

at VCC = 5V

? HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

VIL= 0.8V (Max), VIH = 2V (Min)

- CMOS Input Compatibility, Il ≤ 1μA at VOL, VOH

Description

The ’HC192, ’HC193 and ’HCT193 are asynchronously

presettable BCD Decade and Binary Up/Down synchronous

counters, respectively.

Presetting the counter to the number on the preset data inputs

(P0-P3) is accomplished by a LOW asynchronous parallel

load input (PL). The counter is incremented on the low-to-high

transition of the Clock-Up input (and a high level on the Clock-

Down input) and decremented on the low to high transition of

the Clock-Down input (and a high level on the Clock-up input).

A high level on the MR input overrides any other input to clear

the counter to its zero state. The Terminal Count up (carry)

goes low half a clock period before the zero count is reached

and returns to a high level at the zero count. The Terminal

Count Down (borrow) in the count down mode likewise goes

low half a clock period before the maximum count (9 in the

192 and 15 in the 193) and returns to high at the maximum

count. Cascading is effected by connecting the carry and

borrow outputs of a less significant counter to the Clock-Up

and Clock-Down inputs, respectively, of the next most

significant counter.

If a decade counter is preset to an illegal state or assumes an

illegal state when power is applied, it will return to the normal

sequence in one count as shown in state diagram.

供應商 型號 品牌 批號 封裝 庫存 備注 價格
TI(德州儀器)
24+
SO16208mil
7350
現(xiàn)貨供應,當天可交貨!免費送樣,原廠技術(shù)支持!!!
詢價
TI(德州儀器)
24+
SO16208mil
2886
原裝現(xiàn)貨,免費供樣,技術(shù)支持,原廠對接
詢價
TI(德州儀器)
2024+
SO-16-208mil
500000
誠信服務,絕對原裝原盤
詢價
TI
24+
1250
詢價
Texas Instruments
23+
16-SOIC
4500
特惠實單價格秒出原裝正品假一罰萬
詢價
TI
2025+
PDIP-16
16000
原裝優(yōu)勢絕對有貨
詢價
TI/德州儀器
23+
SOP16
9990
正規(guī)渠道,只有原裝!
詢價
TI/德州儀器
24+
SOP-16
9600
原裝現(xiàn)貨,優(yōu)勢供應,支持實單!
詢價
TI/德州儀器
23+
SOP16
5000
TI原廠原裝全系列訂貨假一賠十
詢價
Texas Instruments(德州儀器)
22+
NA
500000
萬三科技,秉承原裝,購芯無憂
詢價