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CD74HC193E.A中文資料德州儀器數(shù)據(jù)手冊PDF規(guī)格書

CD74HC193E.A
廠商型號

CD74HC193E.A

功能描述

High-Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

文件大小

759.25 Kbytes

頁面數(shù)量

27

生產(chǎn)廠商 Texas Instruments
企業(yè)簡稱

TI2德州儀器

中文名稱

美國德州儀器公司官網(wǎng)

原廠標識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2025-7-6 23:00:00

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CD74HC193E.A規(guī)格書詳情

Features

? Synchronous Counting and Asynchronous

Loading

? Two Outputs for N-Bit Cascading

? Look-Ahead Carry for High-Speed Counting

? Fanout (Over Temperature Range)

- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

? Wide Operating Temperature Range . . . -55oC to 125oC

? Balanced Propagation Delay and Transition Times

? Significant Power Reduction Compared to LSTTL

Logic ICs

? HC Types

- 2V to 6V Operation

- High Noise Immunity: NIL = 30%, NIH = 30% of VCC

at VCC = 5V

? HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

VIL= 0.8V (Max), VIH = 2V (Min)

- CMOS Input Compatibility, Il ≤ 1μA at VOL, VOH

Description

The ’HC192, ’HC193 and ’HCT193 are asynchronously

presettable BCD Decade and Binary Up/Down synchronous

counters, respectively.

Presetting the counter to the number on the preset data inputs

(P0-P3) is accomplished by a LOW asynchronous parallel

load input (PL). The counter is incremented on the low-to-high

transition of the Clock-Up input (and a high level on the Clock-

Down input) and decremented on the low to high transition of

the Clock-Down input (and a high level on the Clock-up input).

A high level on the MR input overrides any other input to clear

the counter to its zero state. The Terminal Count up (carry)

goes low half a clock period before the zero count is reached

and returns to a high level at the zero count. The Terminal

Count Down (borrow) in the count down mode likewise goes

low half a clock period before the maximum count (9 in the

192 and 15 in the 193) and returns to high at the maximum

count. Cascading is effected by connecting the carry and

borrow outputs of a less significant counter to the Clock-Up

and Clock-Down inputs, respectively, of the next most

significant counter.

If a decade counter is preset to an illegal state or assumes an

illegal state when power is applied, it will return to the normal

sequence in one count as shown in state diagram.

供應商 型號 品牌 批號 封裝 庫存 備注 價格
TI(德州儀器)
24+
SOP16
7350
現(xiàn)貨供應,當天可交貨!免費送樣,原廠技術支持!!!
詢價
TI(德州儀器)
24+
SOP16
1504
原裝現(xiàn)貨,免費供樣,技術支持,原廠對接
詢價
HARRIS
24+
SOP
266
詢價
Texas Instruments
23+
16-SOIC
3600
只做原裝,假一賠十
詢價
RCA
24
公司優(yōu)勢庫存 熱賣中!!!
詢價
TI
2025+
PDIP-16
16000
原裝優(yōu)勢絕對有貨
詢價
Texas Instruments
2022+
原廠原包裝
8600
全新原裝 支持表配單 中國著名電子元器件獨立分銷
詢價
Texas Instruments(德州儀器)
22+
NA
500000
萬三科技,秉承原裝,購芯無憂
詢價
Texas Instruments
23+
16-SOIC
7300
專注配單,只做原裝進口現(xiàn)貨
詢價
TI/德州儀器
25+
原廠封裝
10280
詢價