EVAL-ADN4652EB1Z開(kāi)發(fā)板套件編程器的評(píng)估演示板及套件規(guī)格書(shū)PDF中文資料

EVAL-ADN4652EB1Z屬于開(kāi)發(fā)板套件編程器的評(píng)估演示板及套件。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的EVAL-ADN4652EB1Z評(píng)估和演示板及套件該系列產(chǎn)品提供了一種方便的方法，在經(jīng)過(guò)驗(yàn)證的實(shí)施環(huán)境中評(píng)估某些重點(diǎn)器件的性能或特性。評(píng)估方法通常有完善的文檔說(shuō)明，并且視乎具體情況由評(píng)估軟件提供支持。產(chǎn)品通常由印刷電路板組成，板上已裝有重點(diǎn)器件以及必要或有用的支持元器件，另外也可能包括其他組件，例如電纜或電源。對(duì)于數(shù)量特別多或類(lèi)別獨(dú)特的器件類(lèi)別(如 ADC、DAC 和開(kāi)關(guān)模式電源)，評(píng)估平臺(tái)可組合為一個(gè)單獨(dú)的產(chǎn)品系列。

GENERAL DESCRIPTION

The ADN4650/ADN4651/ADN46521 are signal isolated, low voltage differential signaling (LVDS) buffers that operate at up to 600 Mbps with very low jitter. The devices integrate Analog Devices, Inc., iCoupler? technology, enhanced for high speed operation, to provide galvanic isolation of the TIA/EIA-644-A compliant LVDS drivers and receivers.

This technology allows drop-in isolation of an LVDS signal chain.

Multiple channel configurations are offered, and the LVDS receivers on the ADN4651/ADN4652 include a fail-safe mechanism to

ensure a Logic 1 on the corresponding LVDS driver output when the inputs are floating, shorted, or terminated, but not

driven.

For high speed operation with low jitter, the LVDS and isolator circuits rely on a 2.5 V supply. An integrated on-chip low dropout

regulator (LDO) can provide the required 2.5 V from an external

3.3 V power supply. The devices are fully specified over a wide

industrial temperature range and are available in a 20-lead, wide body SOIC package with 5 kV rms isolation or a 20-lead

SSOP package with 3.75 kV rms isolation.

FEATURES 5 kV rms/3.75 kV rms LVDS isolator

Complies with TIA/EIA-644-A LVDS standard Multiple dual-channel configurations

Up to 600 Mbps switching with low jitter

4.5 ns maximum propagation delay 151 ps maximum peak-to-peak total jitter at 600 Mbps 100 ps maximum pulse skew 600 ps maximum part to part skew 2.5 V or 3.3 V supplies ?75 dBc power supply ripple rejection and glitch immunity ±8 kV IEC 61000-4-2 ESD protection across isolation barrier

High common-mode transient immunity: >25 kV/μs Passes EN55022 Class B radiated emissions limits with

600 Mbps PRBS

Safety and regulatory approvals (20-lead SOIC package)

UL: 5000 V rms for 1 minute per UL 1577 CSA Component Acceptance Notice 5A VDE certificate of conformity DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 VIORM = 424 V peak

Fail-safe output high for open, short, and terminated input conditions (ADN4651/ADN4652)

Operating temperature range: ?40°C to +125°C Choice of package and isolation options 3.75 kV rms in highly integrated 20-lead SSOP

5 kV rms in 20-lead SOIC with 7.8 mm creepage/clearance

APPLICATIONS

Analog front-end (AFE) isolation Data plane isolation

Isolated high speed clock and data links

Isolated serial peripheral interface (SPI) over LVDS