ICS83940DYT中文資料ICST數(shù)據(jù)手冊PDF規(guī)格書

GENERAL DESCRIPTION

The ICS83940D is a low skew, 1-to-18 LVPECLto-LVCMOS/LVTTL Fanout Buffer and a member of the HiPerClockS? family of High Performance Clock Solutions from ICS. The ICS83940D has two selectable clock inputs. The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL input levels. The LVCMOS_CLK can accept LVCMOS or LVTTL input levels. The low impedance LVCMOS/LVTTL outputs are designed to drive 50? series or parallel terminated transmission lines.

FEATURES

? 18 LVCMOS/LVTTL outputs

? Selectable LVCMOS_CLK or LVPECL clock inputs

? PCLK, nPCLK supports the following input types: LVPECL, CML, SSTL

? LVCMOS_CLK accepts the following input levels: LVCMOS or LVTTL

? Maximum output frequency: 250MHz

? Output skew: 150ps (maximum)

? Part to part skew: 750ps (maximum)

? Additive phase jitter, RMS: < 0.03ps (typical)

? Full 3.3V and 2.5V or mixed 3.3V core, 2.5V output supply modes

? 0°C to 70°C ambient operating temperature

? Lead-Free package available

? Pin compatible with the MPC940L