LPC2105FBD48SLASH01中文資料飛利浦?jǐn)?shù)據(jù)手冊(cè)PDF規(guī)格書

General description

The LPC2104, 2105 and 2106 are based on a 16/32 bit ARM7TDMI-S CPU with real-time emulation and embedded trace support, together with 128 kbytes (kB) of embedded high speed flash memory. A 128 bit wide memory interface and a unique accelerator architecture enable 32 bit code execution at maximum clock rate. For critical code size applications, the alternative 16-bit Thumb Mode reduces code by more than 30% with minimal performance penalty.

Key features

■ 16/32 bit ARM7TDMI-S processor.

■ 16/32/64 kB on-chip Static RAM.

■ 128 kB on-chip Flash Program Memory. 128 bit wide interface/accelerator enables high speed 60 MHz operation.

■ In-System Programming (ISP) and In-Application Programming (IAP) via on-chip boot-loader software. Flash programming takes 1 ms per 512 byte line. Single sector or full chip erase takes 400 ms.

■ Vectored Interrupt Controller with configurable priorities and vector addresses.

■ EmbeddedICE-RT interface enables breakpoints and watchpoints. Interrupt service routines can continue to execute whilst the foreground task is debugged with the on-chip RealMonitor software.

■ Embedded Trace Macrocell enables non-intrusive high speed real-time tracing of instruction execution.

■ Multiple serial interfaces including two UARTs (16C550), Fast I2C (400 kbits/s) and SPI.

■ Two 32-bit timers (7 capture/compare channels), PWM unit (6 outputs), Real Time Clock and Watchdog.

■ Up to thirty-two 5 V tolerant general purpose I/O pins in a tiny LQFP48 (7 × 7 mm2) package.

■ 60 MHz maximum CPU clock available from programmable on-chip Phase-Locked Loop.

■ On-chip crystal oscillator with an operating range of 1 MHz to 30 MHz.

■ Two low power modes, Idle and Power-down.

■ Processor wake-up from Power-down mode via external interrupt.

■ Individual enable/disable of peripheral functions for power optimization.

■ Dual power supply:

◆ CPU operating voltage range of 1.65 V to 1.95 V (1.8 V ±8.3%).

◆ I/O power supply range of 3.0 V to 3.6 V (3.3 V ±10%) with 5 V tolerant I/O pads.