SLG46517_V01中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

Key Features

? Four Analog Comparators

? Voltage Reference

? Seventeen Combination Function Macrocells

? Three Selectable DFF/LATCH or 2-bit LUTs

? One Selectable Continuous DFF/LATCH or 3-bit LUT

? Four Selectable DFF/LATCH or 3-bit LUTs

? One Selectable Pipe Delay or 3-bit LUT

? One Selectable Programmable Pattern Generator or

2-bit LUT

? Five 8-bit Delays/Counters or 3-bit LUTs

? Two 16-bit Delays/Counters or 4-bit LUTs

? Asynchronous State Machine

? Eight States

? Flexible Input Logic from State Transitions

? Serial Communications

? I2C Protocol Interface

? Pipe Delay – 16 Stage/3 Output (Part of Combination

Function Macrocell)

? Programmable Delay

? Additional Logic Functions – 2 Deglitch Filters with Edge

Detectors

? Two Oscillators