V62SLASH23624-01XE中文資料德州儀器數(shù)據(jù)手冊PDF規(guī)格書

1 Features

? 2 V to 5.5 V VCC operation

? Supports mixed-mode voltage operation on all

ports

? Ioff supports partial-power-down mode operation

? Latch-up performance exceeds 250 mA

per JESD 17

? Operating ambient temperature: -55°C to +125°C

? Supports defense, aerospace, and medical

applications:

– Controlled baseline

– One assembly and test site

– One fabrication site

– Extended product life cycle

– Product traceability

2 Applications

? Increase the number of inputs on a microcontroller

? Expand system clock

3 Description

The SN74LV393B-EP contains eight flip-flops and

additional gating to implement two individual 4-bit

counters in a single package and is designed for 2

V to 5.5 V VCC operation.

This device fully specified for partial-power-down

applications using Ioff. The Ioff circuitry disables

the outputs, preventing damaging current backflow

through the device when powered down.