WC32P020-XP2M

16 32-Bit General-Purpose Data and Address Registers

DESCRIPTION TheWC32P020isa32-bitimplementationofthe68000Familyofmicroprocessors.UsingHCMOStechnology,theWC32P020isimplementedwith32-bitregistersanddatapaths,32-bitaddresses,apowerfulinstructionset,andflexibleaddressingmodes. 68020FEATURES ■SelectionofProce

WC32P020-XP2M

16 32-Bit General-Purpose Data and Address Registers; ■ Selection of Processor Speeds: 16.67, 20, 25 MHz\n■ Military Temperature Range: -55°C to +125°C\n■ Packaging\n?? ? 114 pin Ceramic PGA (P2)\n?? ? 132 lead Ceramic Quad Flatpack, CQFP (Q2)\n■ Object-code compatible with earlier 68000 Microprocessors\n■ Addressing mode extensions for enhanced support of high-level languages\n■ Bit Field Data Type Accelerates Bit-Oriented Applications–i.e., Video Graphics\n■ Fast On-Chip Instruction Cache Speeds Instructions and Improves Bus Bandwidth\n■ Coprocessor Interface to Companion 32-Bit Peripherals–the 68881 and 68882 Floating-Point Coprocessors and the 68851 Paged Memory Management Unit\n■ Pipelined Architecture with High Degree of Internal Parallelism allowing Multiple Instructions to be executed concurrently\n■ High-Performance Asynchronous Bus Is Nonmultiplexed and Full 32-Bits\n■ Dynamic Bus Sizing Effi ciently Supports 8-/16-/32-Bit Memories and Peripherals\n■ Full Support of Virtual Memory and Virtual Machine\n■ 16 32-Bit General-Purpose Data and Address Registers\n■ Two 32-Bit Supervisor Stack Pointers and Five Special-Purpose Control Registers\n■ 18 Addressing Modes and 7 Data Types\n■ 4 GigaByte Direct Addressing Range;

DESCRIPTION\nThe WC32P020 is a 32-bit implementation of the 68000 Family of microprocessors. Using HCMOS technology, the WC32P020 is implemented with 32-bit registers and data paths, 32-bit addresses, a powerful instruction set, and fl exible addressing modes.68020 FEATURES\n■ Selection of Processor Speeds: 16.67, 20, 25 MHz\n■ Military Temperature Range: -55°C to +125°C\n■ Packaging\n?? ? 114 pin Ceramic PGA (P2)\n?? ? 132 lead Ceramic Quad Flatpack, CQFP (Q2)\n■ Object-code compatible with earlier 68000 Microprocessors\n■ Addressing mode extensions for enhanced support of high-level languages\n■ Bit Field Data Type Accelerates Bit-Oriented Applications–i.e., Video Graphics\n■ Fast On-Chip Instruction Cache Speeds Instructions and Improves Bus Bandwidth\n■ Coprocessor Interface to Companion 32-Bit Peripherals–the 68881 and 68882 Floating-Point Coprocessors and the 68851 Paged Memory Management Unit\n■ Pipelined Architecture with High Degree of Internal Parallelism allowing Multiple Instructions to be executed concurrently\n■ High-Performance Asynchronous Bus Is Nonmultiplexed and Full 32-Bits\n■ Dynamic Bus Sizing Effi ciently Supports 8-/16-/32-Bit Memories and Peripherals\n■ Full Support of Virtual Memory and Virtual Machine\n■ 16 32-Bit General-Purpose Data and Address Registers\n■ Two 32-Bit Supervisor Stack Pointers and Five Special-Purpose Control Registers\n■ 18 Addressing Modes and 7 Data Types\n■ 4 GigaByte Direct Addressing Range