零件型號 | 下載 訂購 | 功能描述 | 制造商 上傳企業(yè) | LOGO |
---|---|---|---|---|
ZL30105 | PDH/SDH System Synchronizer; Accepts three input references and synchronizes to any combination of 2, 8 kHz, 1.544, 2.048, 8.192, 16.384 or 19.44 MHz inputs\nSynchronizes to clock-and-sync-pair to maintain minimal phase skew between redundant system clocks\nProvides a range of clock outputs: 1.544, 2.048, 3.088, 16.384, and 19.44 MHz, and either 4.096 and 8.192 MHz or 32.768 and 65.536 MHz, and a choice of 6.312, 8.448, 44.736 or 34.368 MHz\nProvides 5 styles of 8 kHz framing pulses and a 2 kHz multi-frame pulse\nUltra-low jitter of less than 20 psRMS on the 19.44 MHz clock\nLess than 600 psp-p intrinsic jitter on all the other clock and frame pulse outputs\nHoldover frequency accuracy of 1x10-8\nSimple hardware control interface offers manual or automatic hitless reference switching\nSupports ITU-T G.813 option 1, G.823 for 2048 kbs and G.824 for 1544 kbs interfaces\nSupports Telcordia GR-1244-CORE Stratum 3/4/4E\nSupports ANSI T1.403 and ETSI ETS 300 011 for ISDN primary rate interfaces; The ZL30105 is a high-performance DPLL (digital phase-locked loop) designed for synchronization and timing control of redundant system clocks requiring Stratum 3 and SDH timing specifications. The ZL30105 generates SBI, ST-BUS and other TDM clock and framing signals that are phase locked to one of three network references. It helps ensure system reliability by monitoring its references for frequency accuracy and stability and by maintaining tight phase alignment between redundant primary and secondary system clocks even in the presence of high network jitter.The ZL30105 is intended to be the central timing and synchronization resource for network equipment that complies with ITU-T, Telcordia, ETSI and ANSI network specifications. | MicrochipMicrochip Technology 微芯科技微芯科技股份有限公司 | Microchip | |
ZL30105 | T1/E1/SDH Stratum 3 Redundant System Clock Synchonizer for AdvancedTCA and H.110 | ZARLINK Zarlink Semiconductor | ZARLINK | |
T1/E1/SDH Stratum 3 Redundant System Clock Synchronizer for AdvancedTC TM and H.110 | ZARLINK Zarlink Semiconductor | ZARLINK | ||
T1/E1/SDH Stratum 3 Redundant System Clock Synchonizer for AdvancedTCA and H.110 | ZARLINK Zarlink Semiconductor | ZARLINK | ||
T1/E1/SDH Stratum 3 Redundant System Clock Synchronizer for AdvancedTC TM and H.110 | ZARLINK Zarlink Semiconductor | ZARLINK | ||
T1/E1/SDH Stratum 3 Redundant System Clock Synchronizer for AdvancedTC TM and H.110 | ZARLINK Zarlink Semiconductor | ZARLINK | ||
Package:64-TQFP;包裝:卷帶(TR)剪切帶(CT)Digi-Reel? 得捷定制卷帶 類別:集成電路(IC) 應用特定時鐘/定時 描述:IC PHASE LOCK LOOP DGTL 64TQFP | MicrochipMicrochip Technology 微芯科技微芯科技股份有限公司 | Microchip |
技術(shù)參數(shù)
- Typical Jitter (12kHz-20MHz) fs RMS:
Up to OC-3/STM-1
- DPLLs or Paths:
1
- DPLL Bandwidth (Hz):
1.8 Hz
- Inputs:
3
- Diff Outputs:
0
- CMOS Outputs:
11
- Low-Jitter Synthesizers:
0
- General Purpose Synthsizers:
0
- Diff InputFreq. Range:
2 kHz
供應商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
ZARLINK |
25+ |
QFP |
12496 |
ZARLINK原裝正品ZL30105即刻詢購立享優(yōu)惠#長期有貨 |
詢價 | ||
Zarlink |
QFP |
245 |
正品原裝--自家現(xiàn)貨-實單可談 |
詢價 | |||
ZARLINK |
2020+ |
QFP |
7 |
百分百原裝正品 真實公司現(xiàn)貨庫存 本公司只做原裝 可 |
詢價 | ||
ZARLINK |
24+ |
QFP |
2685 |
原裝優(yōu)勢!自家現(xiàn)貨供應!歡迎來電! |
詢價 | ||
MITEL |
18+ |
QFP |
85600 |
保證進口原裝可開17%增值稅發(fā)票 |
詢價 | ||
ZARLINK |
20+ |
TQFP |
500 |
樣品可出,優(yōu)勢庫存歡迎實單 |
詢價 | ||
ZARLINK |
2138+ |
QFP |
8960 |
專營BGA,QFP原裝現(xiàn)貨,假一賠十 |
詢價 | ||
ZARINK |
23+ |
QFP |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價 | ||
ZARLINK |
23+ |
TQFP |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價 | ||
ZARINK |
18+ |
QFP |
800 |
一級代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力 |
詢價 |
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