ZL30111

POTS line card PLL; Synchronizes to 8 kHz, 2.048 MHz, 8.192 MHz or 19.44 MHz input\nProvides a range of clock outputs: 2.048 MHz, 4.096 MHz and 8.192 MHz\nProvides 2 styles of 8 kHz framing pulses\nAutomatic entry and exit from freerun mode on reference fail Provides DPLL lock and reference fail indication\nDPLL bandwidth of 922 Hz for all rates of input reference and 58 Hz for an 8 kHz input reference\nLess than 0.6 nsppintrinsic jitter on all output clocks\n20 MHz external master clock source: clock oscillator or crystal\nSimple hardware control interface;

The ZL30111 POTS line card PLL contains a digital phase-locked loop (DPLL), which provides timing and synchronization for SLIC/CODEC devices.The ZL30111 generates TDM clock and framing signals that are phase locked to the input reference. It helps ensure system reliability by monitoring its reference for stability and by maintaining stable output clocks during short periods when the reference is unavailable.

ZL30111

POTS Line Card PLL

ZL30111QDG

PDH (T1/E1) TIming;

POTS Line Card PLL

ZL30111QDG

POTS Line Card PLL

ZL30111QDG1

POTS Line Card PLL

ZL30111QDG1

Package：64-TQFP；包裝：卷帶（TR） 類別：集成電路（IC） 應(yīng)用特定時鐘/定時 描述：IC POTS LINE CARD PLL 64TQFP